As a Lead Quantum Device Theorist, you will play a central role in advancing the performance of our superconducting quantum processors. This position requires deep expertise in circuit QED, quantum device physics, and noise modeling for quantum error correction (QEC). You will work closely with experimental teams to model processor dynamics and lead efforts to improve qubit readout fidelity and quantum gate performance across our R&D platforms.

This role demands strong cross-functional collaboration with specialists in qubit readout, gate calibration, control systems, and superconducting circuit design. Together, you will drive innovations that support scalable architectures, quantum advantage, and fault-tolerant error correction.

We are seeking a candidate who excels at solving complex device-physics challenges in large-scale superconducting quantum processors. You will develop mitigation strategies grounded in first-principles modeling, including optimal Hamiltonian engineering, noise-spectral analysis, and system-level simulations spanning design, and post-deployment characterization. This role requires deep expertise in circuit QED, tunable coupler architectures, multi-level system dynamics, and decoherence mechanisms, along with the ability to translate theoretical insights into experimentally actionable improvements in gate and readout performance. Strong collaboration across device design, calibration, and control teams is essential.